Flash Memory Status Register (Fsr) - Fujitsu MB95630H Series Hardware Manual

CHAPTER 25 DUAL OPERATION FLASH MEMORY
25.8 Registers
25.8.2

Flash Memory Status Register (FSR)

This section describes the Flash memory status register (FSR).
■ Register Configuration
bit 7
Field —
Attribute —
Initial value 0
■ Register Functions
[bit7:6] Undefined bits
Their read values are always "0". Writing values to these bits has no effect on operation.
[bit5] RDYIRQ: Flash memory operation flag bit
This bit indicates the operating state of the Flash memory.
After the Flash memory programming/erasing is completed, the RDYIRQ bit is set to "1" at the point when
the automatic algorithm of the Flash memory ends.
With the interrupt triggered by the completion of Flash memory programming/erasing having been enabled
(FSR:IRQEN = 1), if the RDYIRQ bit is set to "1", an interrupt request occurs.
After Flash memory programming/erasing is completed, if the RDYIRQ bit has already been set to "0",
further Flash memory programming/erasing is disabled. Writing a reset command can make the Flash
memory return to the normal command state.
Writing "0" to this bit clears it.
Writing "1" to this bit has no effect on operation.
When read by the read-modify-write (RMW) type of instruction, this bit always returns "1".
bit5
Reading "0"
Reading "1"
Writing "0"
Writing "1"
[bit4] RDY: Flash memory program/erase status bit
This bit indicates the program/erase status of the Flash memory.
When the RDY bit is "0", programming data into and erasing data from the Flash memory are disabled.
The read/reset command/sector erase suspend command can still be accepted when the RDY bit is "0". When
programming or erasing ends, the RDY bit is set to "1".
After a program/erase command is issued, there is a delay of two machine clock (MCLK) cycles before the
RDY bit becomes "0". After the issue of a program/erase command, wait for those two machine clock cycles
to elapse (e.g. inserting NOP twice) before reading this bit.
bit4
Reading "0"
Reading "1"
[bit3] Reserved bit
Always set this bit to "0".
562
6 5
— RDYIRQ
— R/W
0 0
Indicates that Flash memory programming/erasing is in progress.
Indicates that Flash memory programming/erasing has been completed.
Clears this bit.
Has no effect on operation.
Indicates that data is being programmed/erased. (Programming/erasing next data is disabled.)
Indicates that data has been programmed/erased. (Programming/erasing next data is enabled.)
FUJITSU SEMICONDUCTOR LIMITED
4 3
RDY Reserved IRQEN
R W
X 0
Details
Details
MB95630H Series
2 1
WRE
R/W R/W
0 0
MN702-00009-1v0-E
0
SSEN
R/W
0