8-Bit Ppg Independent Mode - Fujitsu MB95630H Series Hardware Manual

MB95630H Series
18.6.1

8-bit PPG Independent Mode

In this mode, the 8/16-bit PPG operates as two channels (PPG timer n0 and
PPG timer n1) of the 8-bit PPG.
■ Setting 8-bit PPG Independent Mode
The 8/16-bit PPG requires the register settings shown in Figure 18.6-1 to operate in 8-bit PPG
independent mode.
PCn1
PCn0
PPSn1
PPSn0
PDSn1
PDSn0
PPGS
REVC
: Used bit
0 : Set to "0"
* : The bit status depends on the number of channels provided.
■ Operation of 8-bit PPG Independent Mode
• This mode is selected when the operation mode select bits (MD[1:0]) in the 8/16-bit PPG
timer n0 control register (PCn0) are set to "0b00".
• When the corresponding bit (PEN) in the 8/16-bit PPG start register (PPGS) is set to "1",
the value in the 8/16-bit PPG cycle setup buffer register (PPS) is loaded to start down-count
operation. When the count value reaches "1", the value in the cycle setup register is
reloaded to repeat the counting.
• "H" is output to the PPG output synchronizing with the count clock. When the downcounter
value matches the value in the 8/16-bit PPG timer n1/n0 duty setup buffer register (PDS).
After "H" which is the value of duty setting is output, "L" is output to the PPG output.
If, however, the PPG output level reverse bit is set to "1", the PPG output is set and reset
inversely from the above process.
Figure 18.6-2 shows the operation of the 8-bit PPG independent mode.
MN702-00009-1v0-E
Figure 18.6-1 8-bit PPG Independent Mode
bit7 bit6 bit5
- - PIE1
MD1 MD0 PIE0
0 0
PH7 PH6 PH5
Set PPG output cycle for PPG timer n1
PL7 PL6 PL5
Set PPG output cycle for PPG timer n0
DH7 DH6 DH5
Set PPG output duty for PPG timer n1
DL7 DL6 DL5
Set PPG output duty for PPG timer n0
- - PEN21 PEN20 PEN11 PEN10 PEN01 PEN00
* * *
- - REV21 REV20 REV11 REV10 REV01 REV00
* * *
FUJITSU SEMICONDUCTOR LIMITED
18.6 Operations and Setting Procedure Example
bit4 bit3 bit2
PUF1 POEN1 CKS12 CKS11 CKS10
PUF0 POEN0 CKS02 CKS01 CKS00
PH4 PH3 PH2
PL4 PL3 PL2
DH4 DH3 DH2
DL4 DL3 DL2
* * *
* * *
CHAPTER 18 8/16-BIT PPG
bit1 bit0
PH1 PH0
PL1 PL0
DH1 DH0
DL1 DL0
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