Fujitsu MB95630H Series Hardware Manual page 581

8-bit microcontroller new 8fx
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MB95630H Series
[bit1] ETIEN: ERSTO interrupt enable bit
This bit enables or disables the generation of interrupt requests triggered by the failure of Flash memory
sector erase.
bit1
Writing "0"
Writing "1"
[bit0] ERSTO: ERSTO interrupt request flag bit
This bit indicates that Flash memory sector erase has failed.
When Flash memory sector erase fails, the ERSTO bit is set to "1" upon completion of the Flash memory
automatic algorithm. Afterward, further Flash memory programming/erasing is disabled. Writing a reset
command can make the Flash memory return to the normal command state.
An interrupt request is generated when the ERSTO bit is set to "1", provided that generating an interrupt
request upon failure of Flash memory sector erase has been enabled (FSR2:ETIEN = 1).
Writing "0" to this bit clears it.
Writing "1" to this bit has no effect on operation.
When read by the read-modify-write (RMW) type of instruction, this bit always returns "1".
bit0
Reading "0"
Reading "1"
Writing "0"
Writing "1"
MN702-00009-1v0-E
Disables the interrupt request upon failure of Flash memory sector erase (FSR2:ERSTO = 1).
Enables the interrupt request upon failure of Flash memory sector erase (FSR2:ERSTO = 1).
Indicates that the device is in the command input wait state or Flash memory erase is in progress.
Indicates that Flash memory sector erase has failed.
Clears this bit.
Has no effect on operation.
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 25 DUAL OPERATION FLASH MEMORY
Details
Details
25.8 Registers
561

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