Fujitsu MB95630H Series Hardware Manual page 471

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MB95630H Series
● Notes on interrupts
When the DTIF bit in the 16-bit MPG output control register (upper) (OPCUR) is set to
"1", control cannot be returned from interrupt processing. Always clear the DTIF bit.
When the WTIF bit in the 16-bit MPG output control register (upper) (OPCUR) is set to
"1", control cannot be returned from interrupt processing. Always clear the WTIF bit.
When the PDIF bit in the 16-bit MPG output control register (lower) (OPCLR) is set to "1",
control cannot be returned from interrupt processing. Always clear the PDIF bit.
When the CPIF bit in the 16-bit MPG input control register (upper) (IPCUR) is set to "1",
control cannot be returned from interrupt processing. Always clear the CPIF bit.
Since the above interrupts share an interrupt vector with other resource, interrupt causes
must be checked carefully by the interrupt processing routine when interrupts are used.
■ Notes on Using 16-bit Timer
● Notes on using a program for setting
To access the 16-bit MPG compare clear register (upper/lower) (CPCUR/CPCLR) and the
16-bit MPG timer buffer register (upper/lower) (TMBUR/TMBLR), the word access
instruction must be used.
Before the prescaler clock is changed, the timer counter should be disable first by setting
the TMEN bit to "0". Modify the CLK[2:0] bits in the 16-bit MPG timer control status
register (TCSR) only when the 16-bit timer is not counting.
If the values loaded to the 16-bit MPG compare clear register (upper) (CPCUR) and the 16-
bit MPG compare clear register (lower) (CPCLR) are the same as the timer counter value,
the comparison operation will not be performed until the next occasion in which the values
of CPCUR and CPCLR are the same as the timer counter value.
● Notes on interrupts
When the ICLR bit in the 16-bit MPG timer control status register (TCSR) is set to "1" and
an interrupt request is enabled (TCSR:ICRE = 1), control cannot be returned from interrupt
processing. Always clear the ICLR bit.
Since the 16-bit timer shares an interrupt vector with other resources, interrupt sources must
be checked carefully by the interrupt processing routine when interrupts are used.
● Notes on pin occupancy
To prevent resource output from clashing, when the MPG is enabled, disable the resource
output of the 16-bit PPG timer (PCNTLn:POEN = 0) and also that of the 16-bit reload timer
(TMCSRLn:OUTE = 0).
● Notes on function conflict
The 16-bit PPG timer and the 16-bit reload timer form part of the MPG. When the MPG is
enabled, the two modules are used for the MPG and cannot work independently of the MPG.
When the 16-bit PPG timer or the 16-bit reload timer is needed for other applications, disable
the MPG first before using them for other applications.
MN702-00009-1v0-E
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 21 MULTI-PULSE GENERATOR
21.7 Notes on Using Multi-pulse Generator
451

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