16-Bit Reload Timer Timer Register (Upper/Lower) (Tmrhn/Tmrln) - Fujitsu MB95630H Series Hardware Manual

CHAPTER 20 16-BIT RELOAD TIMER
20.7 Registers
20.7.3 16-bit Reload Timer Timer Register (Upper/Lower)
(TMRHn/TMRLn)
The 16-bit reload timer timer register (upper/lower) (TMRHn/TMRLn) reads the
count value of the 16-bit downcounter.
■ Register Configuration
TMRHn
bit 7
Field D15
Attribute R/W
Initial value 0
TMRLn
bit 7
Field D7
Attribute R/W
Initial value 0
■ Register Functions
The 16-bit reload timer timer register reads the count value of the 16-bit downcounter.
If the counting operation has already been enabled (TMCSRLn:CNTE = 1) when the 16-bit
reload timer starts counting, the value set to the 16-bit reload timer reload register is reloaded
to the 16-bit reload timer timer register, and then the 16-bit reload timer starts downcounting.
Notes:
• This register can read the count value even during the counting operation of the 16-bit
reload timer. To read this register, use a word transfer instruction, or read the upper
byte of this register first and then its lower byte. The circuit of the 16-bit reload timer
timer register is configured so that the lower byte value is saved when the upper byte
value is read.
• This register is read-only and located at the same address as the 16-bit reload timer
reload register. Therefore, a write access to this register becomes a write access to
the 16-bit reload timer reload register.
374
6 5
D14 D13
R/W R/W
0 0
6 5
D6 D5
R/W R/W
0 0
FUJITSU SEMICONDUCTOR LIMITED
4 3
D12 D11
R/W R/W
0 0
4 3
D4 D3
R/W R/W
0 0
MB95630H Series
2 1
D10 D9
R/W R/W
0 0
2 1
D2 D1
R/W R/W
0 0
MN702-00009-1v0-E
0
D8
R/W
0
0
D0
R/W
0