Uart/Sio Dedicated Baud Rate Generator Prescaler Select Register (Pssrn) - Fujitsu MB95630H Series Hardware Manual

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Table of Contents

CHAPTER 23 UART/SIO DEDICATED BAUD RATE GENERATOR

23.4 Registers

UART/SIO Dedicated Baud Rate Generator

Prescaler Select Register (PSSRn)

The UART/SIO dedicated baud rate generator prescaler select register (PSSRn)

controls the output of the baud rate clock and the prescaler.

■ Register Configuration

Initial value

■ Register Functions

[bit7:3] Undefined bits

Their read values are always "0". Writing values to these bits has no effect on operation.

[bit2] BRGE: Baud rate clock output enable bit

This bit enables or disables outputting the baud rate clock "BRCLK".

When "1" is written to this bit, the value of the BRS[7:0] bits in the BRSRn register is loaded to the 8-bit

downcounter and BRCLK to be supplied to the UART/SIO is output.

Writing "0" to this bit stops the output of BRCLK.

[bit1:0] PSS[1:0]: Prescaler select bits

These bits select a prescaler.

Writing "00"

Writing "01"

Writing "10"

Writing "11"

Disables outputting the baud rate clock.

Enables outputting the baud rate clock.

FUJITSU SEMICONDUCTOR LIMITED

MB95630H Series

MN702-00009-1v0-E