Main Cr Clock Trimming Register (Upper) (Crth) - Fujitsu MB95630H Series Hardware Manual

MB95630H Series
26.3.1

Main CR Clock Trimming Register (Upper) (CRTH)

This section describes the main CR clock trimming register (upper) (CRTH).
■ Register Configuration
bit 7
Field —
Attribute —
Initial value 0
■ Register Functions
[bit7:5] Undefined bits
Their read values are always "0". Writing values to these bits has no effect on operation.
[bit4:0] CRTH[4:0]: Main CR clock coarse trimming bits
The settings of these bits are loaded from the Flash address 0xFFBC (bit4:0) after a reset. Their initial values
are determined by the pre-loaded values in the NVR Flash area.
Coarse trimming modifies the main CR clock frequency with a bigger step. Increasing the coarse trimming
value decreases the main CR clock frequency.
bit4:0
Writing "00000"
:
Writing "11111"
See "26.4 Notes on Main CR Clock Trimming" and "26.5 Notes on Using NVR Interface" for details of
main CR clock trimming and notes on changing the main CR clock values respectively.
MN702-00009-1v0-E
CHAPTER 26 NON-VOLATILE REGISTER (NVR) INTERFACE
6 5
— — CRTH4
— — R/W
0 0
Highest main CR clock frequency
Lowest main CR clock frequency
FUJITSU SEMICONDUCTOR LIMITED
4 3
CRTH3 CRTH2
R/W R/W
X X
Details
:
26.3 Registers
2 1
CRTH1 CRTH0
R/W R/W
X X
0
X
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