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25.5.5
Suspending Sector Erase from Flash Memory ........................................................... 552
25.5.6
Resuming Sector Erase of Flash Memory .................................................................. 553
25.5.7
Unlock Bypass Program ............................................................................................. 554
25.6
Operations ....................................................................................................................... 555
25.7
Flash Security .................................................................................................................. 557
25.8
Registers ......................................................................................................................... 558
25.8.1
Flash Memory Status Register 2 (FSR2) .................................................................... 559
25.8.2
Flash Memory Status Register (FSR) ......................................................................... 562
25.8.3
Flash Memory Sector Write Control Register 0 (SWRE0) .......................................... 565
25.8.4
Flash Memory Status Register 3 (FSR3) .................................................................... 567
25.8.5
Flash Memory Status Register 4 (FSR4) .................................................................... 568
25.9
Notes on Using Dual Operation Flash Memory ............................................................... 576
CHAPTER 26 NON-VOLATILE REGISTER (NVR) INTERFACE ....................... 577
26.1
Overview .......................................................................................................................... 578
26.2
Configuration ................................................................................................................... 579
26.3
Registers ......................................................................................................................... 580
26.3.1
Main CR Clock Trimming Register (Upper) (CRTH) ................................................... 581
26.3.2
Main CR Clock Trimming Register (Lower) (CRTL) ................................................... 582
26.3.3
Main CR Clock Temperature Dependent Adjustment Register (CRTDA) .................. 583
26.3.4
Watchdog Timer Selection ID Register (Upper/Lower) (WDTH/WDTL) ..................... 584
26.4
Notes on Main CR Clock Trimming ................................................................................. 585
26.5
Notes on Using NVR Interface ........................................................................................ 587
CHAPTER 27 COMPARATOR ............................................................................ 589
27.1
Overview .......................................................................................................................... 590
27.2
Configuration ................................................................................................................... 591
27.3
Pins .................................................................................................................................. 593
27.4
Interrupt ........................................................................................................................... 594
27.5
Operations and Setting Procedure Example ................................................................... 595
27.6
Register ........................................................................................................................... 596
27.6.1
Comparator Control Register (CMR0C) ..................................................................... 597
CHAPTER 28 SYSTEM CONFIGURATION CONTROLLER .............................. 599
28.1
Overview .......................................................................................................................... 600
28.2
Register ........................................................................................................................... 601
28.2.1
System Configuration Register (SYSC) ...................................................................... 602
28.3
Notes on Using Controller ............................................................................................... 604
APPENDIX ............................................................................................................. 605
APPENDIX A Instruction Overview ............................................................................................. 606
A.1
Addressing ...................................................................................................................... 609
A.2
Special Instruction ........................................................................................................... 613
A.3
Bit Manipulation Instructions (SETB, CLRB) ................................................................... 617
2
A.4
MC-8FX Instructions .................................................................................................... 618
A.5
Instruction Map ................................................................................................................ 621
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