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CHAPTER 8 HARDWARE/SOFTWARE WATCHDOG TIMER
8.1 Overview
8.1
Overview
The watchdog timer serves as a counter used to prevent programs from
running out of control.
■ Watchdog Timer Function
The watchdog timer functions as a counter used to prevent programs from running out of
control. Once the watchdog timer is activated, its counter needs to be cleared at specified
intervals regularly. A watchdog reset is generated if the timer is not cleared within a certain
amount of time due to a problem such as a program entering an infinite loop.
●
Count clock for the software/hardware watchdog timer
•
For the software watchdog timer, the output of the time-base timer or of the watch prescaler
or of the sub-CR timer can be used as the count clock.
•
For the hardware watchdog timer, only the output of the sub-CR timer can be used as the
count clock.
●
Activation of the software/hardware watchdog timer
•
The software/hardware watchdog timer is to be activated according to the values at the
addresses 0xFFBE and 0xFFBF on the Flash memory, which are copied to the watchdog
timer selection ID register (upper/lower) (WDTH/WDTL) (0x0FEB/0x0FEC).
•
In the case of software activation (software watchdog), the watchdog timer register
(WDTC) must be set to start the watchdog timer function.
•
In the case of hardware activation (hardware watchdog), the watchdog timer starts
automatically after a reset. It can also stop or run in stop mode according to the values at
the addresses 0xFFBE and 0xFFBF on the Flash memory, which are copied to the
watchdog timer selection ID register (upper/lower) (WDTH/WDTL) (0x0FEB/0x0FEC).
See "CHAPTER 26 NON-VOLATILE REGISTER (NVR) INTERFACE" for details of
the watchdog timer selection ID.
•
The intervals of the watchdog timer are shown in Table 8.1-1. If the counter of the
watchdog timer is not cleared, a watchdog reset is generated between the minimum time
and the maximum time. Clear the counter of the watchdog timer within the minimum time.
Table 8.1-1 Interval Times of Watchdog Timer
Count clock type
Time-base timer output
(main clock = 4 MHz)
Watch prescaler output
(subclock = 32.768 kHz)
Sub-CR timer
(sub-CR clock = 50 kHz -150 kHz)
*1: X = 0 or 1
*2: CS[1:0] = 0b00, CSP = 1 (read-only)
100
Count clock switch bit
CS[1:0], CSP
0b000 (software watchdog timer)
0b010 (software watchdog timer)
0b100 (software watchdog timer)
0b110 (software watchdog timer)
1
0bXX1*
(software watchdog timer) or
hardware watchdog timer*
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
Minimum time
524 ms
262 ms
500 ms
250 ms
437 ms
2
Interval time
Maximum time
1.05 s
524 ms
1.00 s
500 ms
2.62 s
MN702-00009-1v0-E
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