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CHAPTER 21 MULTI-PULSE GENERATOR
21.6 Registers
21.6.3.1
16-bit MPG Output Data Register (Upper)
(OPDUR)
The 16-bit MPG output data register (upper) (OPDUR) indicates data to be
loaded to the OPDUR/OPDLR register from the 16-bit MPG output data buffer
register (upper/lower) (OPDBRHx/OPDBRLx), and the waveform to be output to
the OPT5 pin and OPT4 pin.
■ Register Configuration
bit
7
Field
BNKF
Attribute
R
Initial value
0
■ Register Functions
[bit7:4] BNKF, RDA[2:0]: OPDBRHx/OPDBRLx register bits
These bits indicate data in which 16-bit MPG output data buffer register (upper/lower) (OPDBRHx/
OPDBRLx) is to be loaded to the OPDUR/OPDLR register.
bit7:4
Reading "0000"
Reading "0001"
Reading "0010"
Reading "0011"
Reading "0100"
Reading "0101"
Reading "0110"
Reading "0111"
Reading "1000"
Reading "1001"
Reading "1010"
Reading "1011"
Reading a value
other than those
above
[bit3:2] OP5[1:0]: OPT5 output waveform bits
These bits indicate the output waveform to the OPT5 pin.
bit3:2
Reading "00"
Reading "01"
Reading "10"
Reading "11"
432
6
5
RDA2
RDA1
R
R
0
0
Indicates that data in OPDBRH0/OPDBRL0 is to be loaded to OPDUR/OPDLR.
Indicates that data in OPDBRH1/OPDBRL1 is to be loaded to OPDUR/OPDLR.
Indicates that data in OPDBRH2/OPDBRL2 is to be loaded to OPDUR/OPDLR.
Indicates that data in OPDBRH3/OPDBRL3 is to be loaded to OPDUR/OPDLR.
Indicates that data in OPDBRH4/OPDBRL4 is to be loaded to OPDUR/OPDLR.
Indicates that data in OPDBRH5/OPDBRL5 is to be loaded to OPDUR/OPDLR.
Indicates that data in OPDBRH6/OPDBRL6 is to be loaded to OPDUR/OPDLR.
Indicates that data in OPDBRH7/OPDBRL7 is to be loaded to OPDUR/OPDLR.
Indicates that data in OPDBRH8/OPDBRL8 is to be loaded to OPDUR/OPDLR.
Indicates that data in OPDBRH9/OPDBRL9 is to be loaded to OPDUR/OPDLR.
Indicates that data in OPDBRHA/OPDBRLA is to be loaded to OPDUR/OPDLR.
Indicates that data in OPDBRHB/OPDBRLB is to be loaded to OPDUR/OPDLR.
Meaningless
Indicates that "L" level is output to the OPT5 pin.
Indicates that the output of the PPG timer is output to the OPT5 pin.
Indicates that the inverted output is output to the OPT5 pin.
Indicates that "H" level is output to the OPT5 pin.
FUJITSU SEMICONDUCTOR LIMITED
4
3
RDA0
OP51
R
R
0
X
Details
Details
MB95630H Series
2
1
OP50
OP41
R
R
X
X
MN702-00009-1v0-E
0
OP40
R
X
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