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MB95630H Series
● Low-voltage detection reset (optional)
The circuit is only available on certain products. Check the availability of the circuit in the
device data sheet.
The low-voltage detection reset circuit generates a reset if the power supply voltage falls below
a predetermined level.
The logical function of the low-voltage detection reset is equivalent to that of the power-on
reset. All information relating to the power-on reset of this hardware manual also applies to the
low-voltage detection reset.
For details of the low-voltage detection reset, see "CHAPTER 16
DETECTION RESET CIRCUIT".
■ Reset Time
The reset time varies according to the reset source.
•
In the case of software reset, watchdog reset and external reset:
The reset time is affected by the number of machine cycles selected before a reset, the
RAM access protection function inhibiting resets during the RAM access, and the sub-CR
clock oscillation stabilization wait time. The effective time of the RAM access protection
function lengthens according to the number of machine clock cycles selected before a reset.
When a reset occurs with the sub-CR clock oscillation stabilization bit in the system clock
control register 2 (SYCC2:SCRDY) set to "1", the device is released from the reset state
after the main CR clock oscillation stabilization wait time elapses.
When a reset occurs with the sub-CR clock oscillation stabilization bit in the system clock
control register 2 (SYCC2:SCRDY) set to "0", the device is released from the reset state
after both sub-CR clock oscillation stabilization wait time and main CR clock oscillation
stabilization wait time elapse.
•
In the case of power-on reset and low-voltage detection reset:
The device is released from the reset state after both sub-CR clock oscillation stabilization
wait time and main CR clock oscillation stabilization wait time elapse.
■ Reset Output
When the reset input function is effective and the reset output function is effective, the RST pin
outputs "L" level while resetting it. However, the function to output "L" level is not provided
for external reset in the reset pin.
For details of the reset input function and the reset output function setting, see "CHAPTER 28
SYSTEM CONFIGURATION CONTROLLER".
MN702-00009-1v0-E
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 4 RESET
4.1 Reset Operation
LOW-VOLTAGE
63
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