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MB95630H Series
21.6.4
16-bit MPG Output Data Buffer Register (Upper/
Lower) (OPDBRHx/OPDBRLx)
The 16-bit MPG output data buffer register (upper/lower) consists of 12 pairs of
registers (OPDBRHB to OPDBRH0 and OPDBRLB to OPDBRL0). OPDBRHx is
the upper byte register and OPDBRLx the lower byte register. The data of the
OPDBRHx/OPDBRLx registers specified in the BNKF bit and RDA[2:0] bits in
the OPDBRHx register is loaded to the OPDUR and OPDLR registers at the
rising edge of the write signal generated by the data write control unit.
For details of the 16-bit MPG output data buffer register (upper) (OPDBRHx), see "21.6.4.1
16-bit MPG Output Data Buffer Register (Upper) (OPDBRHx)".
For details of the 16-bit MPG output data buffer register (lower) (OPDBRLx), see "21.6.4.2
16-bit MPG Output Data Buffer Register (Lower) (OPDBRLx)".
MN702-00009-1v0-E
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 21 MULTI-PULSE GENERATOR
21.6 Registers
435
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