16-Bit Mpg Input Control Register (Lower) (Ipclr) - Fujitsu MB95630H Series Hardware Manual

MB95630H Series
21.6.5.2 16-bit MPG Input Control Register (Lower)
(IPCLR)
The 16-bit MPG input control register (lower) (IPCLR) controls the input edge
polarity, the noise cancellation function for the SNI2 to SNI0 pins and the edge
detection on the SNI2 to SNI0 pins.
■ Register Configuration
bit 7
Field CPE1
Attribute R/W
Initial value 0
■ Register Functions
[bit7:6] CPE[1:0]: Input edge polarity select bits
These bits select the input edge polarity for the position detection. The position detection operates according
to the input edge polarity selected by these bits.
bit7:6
Writing "00"
Writing "01"
Writing "10"
Writing "11"
[bit5:3] SNC[2:0]: SNI2 to SNI0 noise filter enable bits
These bits determine whether the inputs from the SNI2 to SNI0 pins pass through the noise cancellation
circuit when the inputs are enabled.
The noise cancellation circuit starts the internal n-bit counter when an active level is input (the value of n can
be 2, 3, 4, 5, depending on the settings of the S2[1:0], S1[1:0] and S0[1:0] bits in the noise cancellation
control register). If the active level is held until the counter overflows, the circuit accepts input from the SNI2
to SNI0 pins. Therefore, the pulse width of noise that can be cancelled is about 2
Note: When the noise cancellation circuit is enable, the input becomes invalid in a mode such as stop mode
in which the internal clock is stopped.
bit5
Writing "0"
Writing "1"
bit4
Writing "0"
Writing "1"
bit3
Writing "0"
Writing "1"
MN702-00009-1v0-E
6 5
CPE0 SNC2
R/W R/W
0 0
No edge detection (stop state)
Detection of the rising edge
Detection of the falling edge
Detection of both edges
SNI2 input does not pass through the noise cancellation circuit.
SNI2 input passes through the noise cancellation circuit.
SNI1 input does not pass through the noise cancellation circuit.
SNI1 input passes through the noise cancellation circuit.
SNI0 input does not pass through the noise cancellation circuit.
SNI0 input passes through the noise cancellation circuit.
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 21 MULTI-PULSE GENERATOR
4 3
SNC1 SNC0
R/W R/W
0 0
Details
Details
Details
Details
21.6 Registers
2 1
SEE2 SEE1
R/W R/W
0 0
n
machine cycles.
0
SEE0
R/W
0
443