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10.2 Asynchronous Serial Interface 0 (UART0)
10.2.1 Features
• Transfer rate: 300 bps to 1562.5 Kbps (using a dedicated baud rate generator and an internal system clock of
50 MHz)
• Full-duplex communications
On-chip reception buffer register 0 (RXB0)
On-chip transmission buffer register 0 (TXB0)
• Two-pin configuration
TXD0: Transmit data output pin
RXD0: Receive data input pin
• Reception error detection functions
• Parity error
• Framing error
• Overrun error
• Interrupt sources: 3 types
• Reception error interrupt (INTSER0):
• Reception completion interrupt (INTSR0):
• Transmission completion interrupt (INTST0):
• The character length of transmit/receive data is specified according to the ASIM0 register
• Character length: 7 or 8 bits
• Parity functions: Odd, even, 0, or none
• Transmission stop bits: 1 or 2 bits
• On-chip dedicated baud rate generator
Note The SCK and CTS pins are not available for UART0.
CHAPTER 10 SERIAL INTERFACE FUNCTION
Note
User's Manual U14492EJ3V0UD
Interrupt is generated according to the logical OR of the
three types of reception errors
Interrupt is generated when receive data is transferred from
the shift register to the reception buffer register 0 after serial
transfer is completed during a reception enabled state
Interrupt is generated when the serial transmission of
transmit data (8 or 7 bits) from the shift register is completed
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