Dmac Bus Cycle State Transition - NEC V850E/IA1 mPD703116 User Manual

32-bit single-chip microcontrollers

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(10) TE state

The TE state corresponds to DMA transfer completion. Various internal signals are initialized (n = 0 to 3).

After entering the TE state, the bus invariably enters the TI state.

6.4.2 DMAC bus cycle state transition

Except for the block transfer mode, each time the processing for a DMA transfer is completed, the bus mastership

is released.

Figure 6-1. DMAC Bus Cycle (Two-Cycle Transfer) State Transition

CHAPTER 6 DMA FUNCTIONS (DMA CONTROLLER)

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