Dmac Bus Cycle State Transition; Figure 6-12: Dmac Bus Cycle (Two-Cycle Transfer) State Transition - NEC V850E/CA1 ATOMIC Preliminary User's Manual

32-/16-bit single-chip microcontroller
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6.4.2 DMAC bus cycle state transition

Except for the block transfer mode, each time the processing for a DMA transfer is completed, the bus
mastership is released.

Figure 6-12: DMAC Bus Cycle (Two-Cycle Transfer) State Transition

Chapter 6 DMA Functions (DMA Controller)
Preliminary User's Manual U14913EE1V0UM00
TI
T0
T1R
T2R
T2RI
T1W
T2W
TE
TI
177

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