Register Descriptions; Break Address Register A (Bara) - Hitachi SH7709S Hardware Manual

7.2

Register Descriptions

7.2.1

Break Address Register A (BARA)

BARA is a 32-bit read/write register. BARA specifies the address used as a break condition in
channel A. A power-on reset initializes BARA to H'00000000.
Bit:
BAA31
Initial value:
R/W: R/W
Bit:
BAA23
Initial value:
R/W: R/W
Bit:
BAA15
Initial value:
R/W: R/W
Bit:
BAA7
Initial value:
R/W: R/W
Bits 31 to 0—Break Address A31 to A0 (BAA31 to BAA0): Stores the address on the LAB or
IAB specifying break conditions of channel A.
156
31 30 29
BAA30 BAA29
0 0 0
R/W R/W
23 22 21
BAA22 BAA21
0 0 0
R/W R/W
15 14 13
BAA14 BAA13
0 0 0
R/W R/W
7 6 5
BAA6 BAA5
0 0 0
R/W R/W
28 27 26
BAA28 BAA27 BAA26
0 0 0
R/W R/W R/W
20 19 18
BAA20 BAA19 BAA18
0 0 0
R/W R/W R/W
12 11 10
BAA12 BAA11 BAA10
0 0 0
R/W R/W R/W
4 3 2
BAA4 BAA3 BAA2
0 0 0
R/W R/W R/W
25 24
BAA25 BAA24
0 0
R/W R/W
17 16
BAA17 BAA16
0 0
R/W R/W
9 8
BAA9 BAA8
0 0
R/W R/W
1 0
BAA1 BAA0
0 0
R/W R/W