Program-Verify Mode; Notes On Program/Program-Verify Procedure - Hitachi H8/3022 Hardware Manual

Next, the watchdog timer is set to prevent overprogramming in the event of program runaway, etc.
Set a WDT overflow period greater than (t
program mode (program setup) is carried out by setting the PSU bit in FLMCR1, and after the
) µs or more, the operating mode is switched to program mode by setting the P bit in
elapse of (t
spsu
FLMCR1. The time during which the P bit is set is the flash memory programming time. Make a
setting in the program so that the time for one write operation is within the (t
time after the P bit is set must be changed according to the degree of progress through the
programming operation. For details see section 15.7.3, Notes on Program/Program-Verify
Procedure.
15.7.2

Program-Verify Mode

In program-verify mode, the data written in program mode is read to check whether it has been
correctly written in the flash memory.
After the elapse of a given programming time, the programming mode is exited (the P bit in
FLMCR1 is cleared, then the PSU bit is cleared at least (t
cleared, and the operating mode is switched to program-verify mode by setting the PV bit in
FLMCR1. Before reading in program-verify mode, a dummy write of H'FF data should be made to
the addresses to be read. The dummy write should be executed after the elapse of (t
When the flash memory is read in this state (verify data is read in 16-bit units), the data at the
latched address is read. Wait at least (t
operation. Next, the written data is compared with the verify data, and reprogram data is computed
(see figure 15-11) and transferred to the reprogram data area. After 128 bytes of data have been
verified, exit program-verify mode, wait for at least (t
If reprogramming is necessary, set program mode again, and repeat the program/program-verify
sequence as before. However, ensure that the program/program-verify sequence is not repeated
more than (N) times on the same bits.
Leave a wait time of at least (t
15.7.3

Notes on Program/Program-Verify Procedure

1. The program/program-verify procedure for the H8/3022F is a 128-byte-unit programming
algorithm.
Note that the algorithm is different from that of the H8/3039F-ZTAT Series (32-byte-unit
programming).
In order to perform 128-byte-unit programming, the lower 8 bits of the write start address must
be H'00 or H'80.
2. When performing continuous writing of 128-byte data to flash memory, byte-unit transfer
should be used.
460
+ t
spsu sp
) µs after the dummy write before performing this read
spvr
) µs after clearing SWE.
cswe
) µs. After this, preparation for
+ t + t
cp cpsu
) µs later). The watchdog timer is
cp
) µs, then clear the SWE bit in FLMCR1.
cpv
) µs range. The wait
sp
) µs or more.
spv