Table 143. Error Calculation For Programmed Baud Rates At Fpclk = 42 Mhz Or Fpclk = 84 Mhz - ST STM32F405 Reference Manual

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RM0090
Date
Version
19-Oct-2012
(continued)
Table 315. Document revision history (continued)
RTC:
Updated
Figure 237: RTC block
Added formula to compute
Updated
Section 26.3.9: RTC reference clock
Updated
Section : RTC register write
Added RTC_SSR shadow register in
Updated description of DC[4:0] bits in
(RTC_CALIBR).
Renamed RTC_BKxR into RTC_BKPxR in
values.
Added power-on reset value and changed reset value to system
reset value in
Section 26.6.11: RTC sub second register
Updated definition of ALARMOUTTYPE in
alternate function configuration register
I2C:
Modified
Section 27.3.8: DMA
Updated bit 14 description in
(I2C_OAR1)).
2
Updated definition of PE bit and note related to SWRST bit; moved
note related to STOP bit to the whole register in
1
(I2C_CR1).
USART:
Section 30.6.6: Control register 3
related to UART5 in DMAT and DMAR description.
Updated
TTable 142: Error calculation for programmed baud rates at fPCLK = 42
MHz or fPCLK = 84 Hz, oversampling by 16
Table 143: Error calculation for programmed baud rates at fPCLK = 42 MHz or
fPCLK = 84 MHz, oversampling by
SPI/I2S:
Updated
Section 28.1: SPI
Changed I2S simplex communication/mode to half-duplex communication/mode.
Updated flags in reception/transmission modes in
Added Frame error flag in
Added register access in
Updated ERRIE definition in
Renamed TIFRFE to FRE and definition updated in
register
(SPI_SR).
Changes
diagram.
f
in
Figure 26.3.1: Clock and
ck_apre
protection.
Section 26.3.6: Reading the
Section 26.6.7: RTC calibration register
(RTC_TAFCR).
requests.
Section 27.6.3: I
(USART_CR3)): removed notes
8.
introduction.
2
Table 128: I
S interrupt
Section 28.5: SPI and I
Section 28.5.2: SPI control register 2
RM0090 Rev 18
Revision history
prescalers.
detection.
calendar.
Table 121: RTC register map and reset
(RTC_SSR).
Section 26.6.17: RTC tamper and
2
C Own address register 1
2
Section 27.6.1: I
C Control register
and
2
Section 28.2.2: I
requests.
2
S
registers.
(SPI_CR2).
Section 28.5.3: SPI status
S
features.
1719/1749
1743

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