Table 272. Fmc_Btrx Bit Fields; Table 273. Fmc_Bwtrx Bit Fields - ST STM32F405 Reference Manual

Flexible memory controller (FMC)
Bit
number
5-4
3-2
1
0
Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
1622/1749
Table 271. FMC_BCRx bit fields (continued)
Bit name
MWID As needed
MTYP[1:0] As needed, exclude 0x2 (NOR Flash memory)
MUXEN 0x0
MBKEN 0x1

Table 272. FMC_BTRx bit fields

Bit name
Reserved 0x0
ACCMOD 0x0
DATLAT Don't care
CLKDIV Don't care
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST HCLK cycles) for read
DATAST
accesses.
ADDHLD Don't care
Duration of the first access phase (ADDSET HCLK cycles) for read
accesses.
ADDSET[3:0]
Minimum value for ADDSET is 0.

Table 273. FMC_BWTRx bit fields

Bit name
Reserved 0x0
ACCMOD 0x0
DATLAT Don't care
CLKDIV Don't care
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST HCLK cycles) for write
DATAST
accesses.
ADDHLD Don't care
Duration of the first access phase (ADDSET HCLK cycles) for write
accesses.
ADDSET[3:0]
Minimum value for ADDSET is 0.
RM0090 Rev 18
Value to set
Value to set
Value to set
RM0090