ST STM32F405 Reference Manual page 1473

RM0090
Table 215. OTG_HS register map and reset values (continued)
Offset Register
OTG_HS_GU
SBCFG
0x00C
Reset value 0
OTG_HS_GR
STCTL
0x010
Reset value 1
OTG_HS_GIN
TSTS
0x014
Reset value 0
OTG_HS_GIN
TMSK
0x018
Reset value 0
OTG_HS_GR
XSTSR (Host
mode)
Reset value
0x01C
OTG_HS_GR
XSTSR
(peripheral
mode)
Reset value
OTG_HS_GR
XSTSP (Host
mode)
Reset value
0x020
OTG_HS_GR
XSTSP
(peripheral
mode)
Reset value
OTG_HS_GR
XFSIZ
0x024
Reset value
Reserved
0 0 0 0 0
0
0 0 0 1 0 0
0 0 0 0 0 0
Reserved
FRMNUM
Reserved
0 0
Reserved
FRMNUM
Reserved
0 0
Reserved
USB on-the-go high-speed (OTG_HS)
0 0 0 0 0 0 0
Reserved
0 0 0 0 0 0 0
0 0 0 0 0 0 0
PKTSTS DPID
0 0 0 0 0 0
PKTSTS DPID
0 0 0 0 0 0 0 0 0
PKTSTS DPID
0 0 0 0 0 0
PKTSTS DPID
0 0 0 0 0 0 0 0 0
0 0
RM0090 Rev 18
TRDT
Reserve
0 1 0 1 0 0 1
TXFNUM
0 0 0 0 0 0
0 0 0 0 0 0 1
0 0 0 0 0 0 0
BCNT
0 0 0 0 0 0 0 0 0
BCNT
0 0 0 0 0 0 0 0 0
BCNT
0 0 0 0 0 0 0 0 0
BCNT
0 0 0 0 0 0 0 0 0
RXFD
0 0 0 1 0 0 0 0 0
TOCAL
d
0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0
CHNUM
0 0 0 0
EPNUM
0 0 0 0 0
CHNUM
0 0 0 0
EPNUM
0 0 0 0 0
0 0 0 0 0
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