RM0090
transfers at even addresses: nCE1 will be asserted low, NCE2 will be asserted high
and only the even byte will be valid.
•
Accesses to I/O space can be either 8-bit or 16 bit AHB accesses.
1
0
1
0
0
1
1
0
0
0
1
0
X
0
0
0
X
0
0
0
1
0
0
0
0
1
0
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
0
0
1
0
0
0
1
0
1
0
1
0
1
0
1
FMC Bank 4 gives access to those 3 memory spaces as described in
Flash memory/PC Card address mapping
and timing
Wait feature
The CompactFlash or PC Card may request the FMC to extend the length of the access
phase programmed by MEMWAITx/ATTWAITx/IOWAITx bits, asserting the nWAIT signal
after nOE/nWE or nIORD/nIOWR activation if the wait feature is enabled through the
PWAITEN bit in the FMC_PCRx register. To detect correctly the nWAIT assertion, the
MEMWAITx/ATTWAITx/IOWAITx bits must be programmed as follows:
where max_wait_assertion_time is the maximum time taken by NWAIT to go low once
nOE/nWE or nIORD/nIOWR is low.
Table 294. 16-bit PC-Card signals and access type
1
X
X
X-X
X
1
X
X
X-X
X
1
X
X
X-X
0
1
0
1
X-X
0
1
0
0
X-X
0
1
X
X
X-X
1
1
X
X
X-X
x
0
X
X
X-X
0
0
X
X
X-X
1
0
X
X
X-X
0
0
X
X
X-X
1
0
X
X
X-X
0
0
X
X
X-X
0
0
X
X
X-X
X
0
X
X
X-X
X
registers.
xxWAITx
Space
Access type
Read/Write byte on D7-D0
Common
Memory
Read/Write byte on D15-D8
Space
Read/Write word on D15-D0
Read or Write Configuration
Registers
Attribute
Space
Read or Write CIS (Card
Information Structure)
Invalid Read or Write (odd
address)
Attribute
Space
Invalid Read or Write (odd
address)
Read Even Byte on D7-0
Read Odd Byte on D7-0
Write Even Byte on D7-0
Write Odd Byte on D7-0
I/O space
Read Word on D15-0
Write word on D15-0
Read Odd Byte on D15-8
Write Odd Byte on D15-8
and
Table 256: NAND/PC Card memory mapping
max_wait_assertion_time
≥
4
+
------------------------------------------------------------------ -
HCLK
RM0090 Rev 18
Flexible memory controller (FMC)
Allowed/not
Not supported
Not supported
Not supported
Section 37.4.2: NAND
Allowed
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
1655/1749
1682
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