Sony CXD5602 User Manual page 83

While pin P1s_00 and pin P1s_01 are assigned GPIO role, CD/WP signal of internal IP (SDIO) can be set by
using IOFIX_APP. Figure I/O Configuration-14 shows connecting diagram of CD/WP signal to SDIO IP.
P1s_00
P1s_01
Figure I/O Configuration-14 SDIO WP/CD Input Control Register Schematic
3.1.4.3.32 I2S0
When you use a pin as I2S role, you need to select I2S role by using IOCAPP_IOMD, as well as decide in which
mode I2S role should be played, master or slave. According to the decision, you need to set IOOEN_APP
adequately.
The following are settings that pin P1v_{00,01,02,03} are used as the I2S master.

IO_I2S0_BCK.ENZI=0 (Input Disable)

IO_I2S0_LRCK.ENZI=0 (Input Disable)

IO_I2S0_DATA_IN.ENZI=1(Input Enable)

IOCAPP_IOMD.I2S0=1

IO_IOOEN_APP.I2S0_BCK=0 (Output Enable)

IO_IOOEN_APP.I2S0_LRCK=0 (Output Enable)
IO Configuration
2
1
0 1 2 3
0
1 0
2
3
[0]
1
2
OPEN
3 OPEN
1
0 1 2 3
0
1 0
2
3
[0]
1
2
OPEN
3 OPEN
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IOCAPP_IMOD.SDIOB
GP_SDIO_CD.DIR
GP_SDIO_CD.OUT
When IOCAPP_IOMD.SDIOB = 1,
Connect from P1s_00 to SDIO_CD
When IOCAPP_IOMD.SDIOB = 0,
Connect from IOCFIX_APP.SDIO_CD to SDIO_CD
GP_SDIO_CD.IN
1 SDIO_CD
0
IOCFIX_APP.SDIO_CD
IO_SDIO_CD.ENZI
GP_SDIO_WP.DIR
GP_SDIO_WP.OUT
GP_SDIO_WP.IN
1 SDIO_WP
0
IOCFIX_APP.SDIO_WP
IO_SDIO_WP.ENZI
CXD5602 User Manual
SDIO