Sony CXD5602 User Manual page 222

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3.8.3
SDMAC
Adds a feature to notify the CPU of independent interrupts or each DMA channel to the PrimeCell
Controller (PL230).
The interrupt signal is changed from pulse to level
The interrupt factor register (dma_done, dma_err) is added.
Figure DMAC-42 shows an overview of the independent interrupt signals of each DMA channel.
SDMAC
SDMAC
(PL230)
32
dma_done
(pulse)
32
slave_error
(pulse)
Interrupt Clear
Figure DMAC-42 SDMAC Overview of Added Functions
-222/1010-
Additional logic
(level)
set
clear
set
clear
Interrupt Status
Register
CXD5602 User Manual
®
µDMA

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