Sony CXD5602 User Manual page 948

0x04103420 SYSIOP_SUB_C
KEN
I2CS RW
PCLK_HOSTIFC RW
PCLK_UART0 RW
UART0 RW
Reserved RO
COM_UART_PC RW
LK
Reserved RO
SFC_HCLK_LO RW
W
SFC_SFCLK RW
－948/1010－
[3] 0
Indicated as CG(SYS03) in
SYSIOP
Control-116
Clock
communication
[2] 0
Indicated as CG(SYS02) in
SYSIOP
Control-116
Clock enable for the APB of SPI2 and
I2C3
[1] 0
Indicated as CG(SYS01) in
SYSIOP
Control-116
UART0 APB clock enable
[0] 0
Indicated as CG(SYS00) in
SYSIOP
Control-116
UART0 communication clock enable
[31:17] 0 Reserved
[16] 0
Indicated as CG(SUB10) in
SYSIOP
Control-116
Clock enable for APB of UART1
[15:10] 0 Reserved
[9] 1
Indicated as CG(SUB09) in
SYSIOP
Control-116
Clock enable for AHB of SPI Flash
Controller
[8] 1
Indicated as CG(SUB08) in
SYSIOP
Control-116
Clock enable for clock generation of SPI
Flash Controller
CXD5602 User Manual
Figure
Clock and Reset
enable for HOSTIFC I2C3
Figure
Clock and Reset
Figure
Clock and Reset
Figure
Clock and Reset
Figure
Clock and Reset
Figure
Clock and Reset
Figure
Clock and Reset