Sony CXD5602 User Manual page 191

SetAlm(Post/Pre)Cnt2 must not be updated). Once the reflection is completed, Busy becomes "0"
automatically.
Busy
0
1
3.6.5.2.20 AlmClr(0x70)
31 30 29 28
Reserved
-
15 14 13 12
Reserved
-
When an Alarm occurs, an Alarm Interrupt is asserted (set). When a Clear Register is written, the Alarm Interrupt
can be deasserted (reset) instantly.

bit[0] : Flg0 (Clear of Normal Alarm Flag0)
When you write "1" on AlmClr.Flg0, Normal Alarm0 Interrupt is deasserted, and Normal Alarm
Flag0 is cleared.
Flg0
0
1

bit[1] : Flg1 (Clear of Normal Alarm Flag1)
Flg1
0
1

bit[1] : Flg1 (Clear of Alarm Flag2)
Flg2
Description of Functions
Reading 0: Alarm Operation time is not set or reflected completely.
Reading 1: Alarm Operation time is being reflected. SetAlm(Post/Pre)Cnt2 must not
be written.
27 26 25 24
11 10 9 8
Description of Functions
Writing 0: invalid
Writing 1: deasserts Normal Alarm Flag0
When Normal Alarm Flag0 is deasserted, this register is cleared to "0" automatically.
Description of Functions
Writing 0: invalid
Writing 1: deasserts Normal Alarm Flag1
When Normal Alarm Flag1 is deasserted, this register is cleared to "0" automatically.
Description of Functions
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23 22 21 20
7 6 5 4
CXD5602 User Manual
19 18 17 16
Err Err
Flg1 Flg0
WO WO
3 2 1 0
Flg2 Flg1 Flg0
WO WO WO