Sony CXD5602 User Manual page 814

(6) Writing program to SEQ_IRAM
(7) Writing setting and initial value to SEQ_DRAM
(8) Sequencer clock stop
(9) Sequencer reset release
(10) Sequencer clock supply start
(11) SPI sequencer operation initial value set
(12) I2C0 sequencer operation initial value set
(13) I2C1 sequencer operation initial value set
(14) Sequencer boot completion wait (optional)
(15) Sequencer startup
(16) LPADC operation start
(17) HPADC0 operation start
(18 )HPADC1 operation start
3.9.13.4 SPI/I2C/ADC Control
For the settings of SPI, I2C0, I2C1, LPADC, HPADC0, and HPADC1, refer to the following Sections.
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SPI sequencer operation initial settings: Section 3.9.13.6.3
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I2C0 sequencer operation initial settings: Section 3.9.13.6.5
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I2C1 sequencer operation initial settings: Section 3.9.13.6.5
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LPADC operation parameter settings: Section 3.9.13.6.6
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LPADC data output start: Section 3.9.13.6.6
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LPADC conversion settings: Section 3.9.13.6.6
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HPADC0 operation parameter settings: Section 3.9.13.6.7
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HPADC0 data output start: Section 3.9.13.6.7
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HPADC1 operation parameter settings: Section 3.9.13.6.8
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HPADC1 data output start settings: Section 3.9.13.6.8
3.9.13.5 FIFO Control
For the following FIFO control procedures, refer to Section 3.9.13.6.9.
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Writing side initial settings
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Readout side initial settings
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FIFO writing process
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FIFO readout process
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Transition process to FIFO (8 KByte) Retention
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Transition process to FIFO (8 KByte) All On
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Transition process to FIFO (8 KByte) All Off
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Transition process to FIFO (32 KByte) Retention
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CXD5602 User Manual