Sony CXD5602 User Manual page 809

n corresponds to the following Write FIFOs.
n = 0, 1, 2, 3
n = 4 , 5, 6, 7
n = 8, 9, 10, 11, 12, 13, 14, 15
N7_W_S
3.9.12.11.12 FIFO_SRAM_POWER_CTRL
OFFSET: 0x02c0
NAME Field Name
FIFO_SRAM_PO Reserved
WER_CTRL
PW_STT_IGNORE1
Reserved
PW_STT_IGNORE0
Reserved
PW_CTRL_EN1
Reserved
PW_CTRL_EN0
Power supply control of the FIFO by the SCU is not supported. Neither turn OFF nor set the FIFO power supply
to retention during operation of the SCU.
3.9.12.11.13 SEQ_RAM_OUT_n_READ_DATA_m
OFFSET: 0x02cc + n x 0x20 + m x 0x040 (n = 0, ..., 2, m = 0, ..., 3)
NAME Field Name
D0_W0_S, D0_W1_S, D0_W2_S, D0_W3_S
D1_W0_S, D1_W1_S, D1_W2_S, D1_W3_S
N0_W_S, N1_W_S, N2_W_S, N3_W_S, N4_W_S, N5_W_S, N6_W_S,
Table SCU (Sensor Control Unit)-696
Bit RW
[31:25]
[24] RW
[23:17]
[16] RW
[15:9]
[8] RW
[7:1]
[0] RW
Table SCU (Sensor Control Unit)-697
Bit RW Description
－809/1010－
Description
Reserved
When writing data to the FIFO, SEQ ignores the power supply
status of the later-half 32 Kbytes of FIFO SRAM.
Reserved
When writing data to the FIFO, SEQ ignores the power supply
status of the first-half 8 KBytes of FIFO SRAM.
Reserved
Performs power down control of the later-half 32 KBytes
region of the FIFO SRAM.
Turns ON the SRAM when any of the sequencers within the
SCU starts up, and switches to the low power mode which
holds values of SRAM when writing to the FIFO is completed.
Reserved
Performs power down control of the first-half 8 KBytes region
of the FIFO SRAM.
Turns ON the SRAM when any of the sequencers within the
SCU starts up, and switches to the low power mode which
holds values of SRAM when writing to the FIFO is completed.
CXD5602 User Manual