Sony CXD5602 User Manual page 197

3.6.5.2.24 AlmFlg(0x80)
31 30 29 28
Reserved
-
15 14 13 12
Reserved
-
By reading this register, you can see Normal Alarm and Error Alarm Flag (Alarm Interrupt value before
controlling registers Enabled or Disabled by using AlmOutEn). When the conditions are as described in the Table
RTC-68 below, an Alarm occurs. When the Alarm is asserted, AlmFlg becomes "1". If you want to clear AlmFlg
to "0", write "1" on AlmClr.
Register Alarm Occurrence Condition
Flg0 when set value of Alarm0 matches RTC Counter value
Flg1 when set value of Alarm1 matches RTC Counter value
Flg2 when time passes to the set value of Alarm2, based on the RTC Counter value at the time of being written on
SetAlmPreCnt2
ErrFlg0 when set value of Alarm0 at the time of being written on SetAlmPreCnt0 is smaller than RTC Counter value
ErrFlg1 when set value of Alarm1 at the time of being written on SetAlmPreCnt1 is smaller than RTC Counter value
Note:
RTC Counter={PostCounter[31:0], PreCounter[14:0] }
Set value of Alarm{0,1,2}= {SetAlmPostCnt{0,1,2} [31:0], SetAlmPreCnt{0,1,2} [14:0] }

bit[0] : Flg0 (Normal Alarm Flag0)
Flg0
0
1

bit[1] : Flg1 (Normal Alarm Flag1)
Flg1
0
27 26 25 24
11 10 9 8
Table RTC-68 Alarm Occurrence Condition
Description of Functions
Normal Alarm0 Interrupt is deasserted.
Normal Alarm0 Interrupt is asserted.
Description of Functions
Normal Alarm1 Interrupt is deasserted.
－197/1010－
23 22 21 20
7 6 5 4
CXD5602 User Manual
19 18 17 16
Err Err
Flg1 Flg0
RO RO
3 2 1 0
Flg2 Flg1 Flg0
RO RO RO