Sony CXD5602 User Manual page 653

3.9.12.10.176 {0x1084} N0_R1_C_CTRL1 Details
Local Address: 0x1084
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
Bits Name
31..26 Reserved
FIFO_DMA_ENA
25
BLE
24 FIFO_ENABLE
23..17 Reserved
16 FIFO_RESET
15..9 Reserved
FIFO_PHASE_RE
8
SET
7..2 Reserved
FIFO_UNDER_RU
1
N_CLR
Table SCU (Sensor Control Unit)-505
Reserved
Reset
Type Description
Value
RO 0x00 Reserved
Output permission of the DMA control signal
When the value is "1", the DMA control signal is permitted
RW 0x0
to output.
When "0", the output is fixed to "0".
Operation permission of the FIFO readout function
When "1" is indicated, the operation is permitted. When
RW 0x0 "0" is indicated, the function operates in a way that the
readout side does not recognize that data is written to the
FIFO.
RO 0x00 Reserved
Reset of the FIFO
WO 0x0 The value of the readout pointer is forced to set the same
value of the writing pointer.
RO 0x00 Reserved
Reset of the readout pointer for the FIFO
WO 0x0 If the readout pointer is in the process of sampling, it is
forced to set at the head of the next sample.
RO 0x00 Reserved
Clearing of the read out error at FIFO empty
WO 0x0 Clears bits which are read out that the number of valid data
of the FIFO is "0"
－653/1010－
Register Type: RW (read/write)
Reset Value: 0x00000000
Reserved
CXD5602 User Manual
Reserved