Sony CXD5602 User Manual page 307

the ADC side.
Table SCU (Sensor Control Unit)-104 ADC Channels and PWM Assignment
Register Name
LPADC_D1[20:12]
LPADC_D4[20:12]
LPADC_D5[20:12]
LPADC_D6[20:12]
HPADC_D0_D1[20:12]
HPADC_D1_D1[20:12]
The synchronization function becomes valid when bit 8 of each register's DECI _RATIO2 is set to "1". The
PWM channel of each synchronization target is selected by bit0 to 7, and by setting each one to "1", the
synchronization signals PWM0 to 7 become valid.
3.9.11.5 Synchronization Function between PWM Channels
This mode synchronizes the timing between any PWM channels. It is also possible to operate multiple PWMs
in a chain sequence. When setting the PWM channel n (n = 0, ..., 7), set the following registers in addition to the
basic operation settings.

PWMn_EN register
PWM_SELLn field [5:3] ... sets channel (m) of the PWM you want to synchronize

PWM_PASEn register
PWM_DELAYn field
After making the settings, perform the additional setting on the PWM channel m which you want to
synchronize. That is to say, write "1" on the PWMm_UPDATE field of the PWMm_EN register. By this
additional setting, the PWM channel n synchronizes with the PWM channel m. The following is an example
setting of synchronizing channel 0 with channel 1.
<Example of Procedures>
[1] Ch0 set
PWM0_PARAM = 0x00070007
PWM_PASE0 = 0x00000001
PWM0_EN = 0x00000011
PWM0_UPDATE = 0x00000001
[2]Ch1 set
PWM1_PARAM = 0x00040007
PWM_PASE1 = 0x00000000
PWM1_EN = 0x00000001
PWM1_UPDATE = 0x00000001 (Ch1＆Ch0 output start)
Field Name
DECI _RATIO2
DECI _RATIO2
DECI _RATIO2
DECI _RATIO2
DECI _RATIO2
DECI _RATIO2
... selects the number of clocks for phase adjustment
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Target ADC
LPADC0
LPADC1
LPADC2
LPADC3
HPADC0
HPADC1
CXD5602 User Manual