Sony CXD5602 User Manual page 300

LPADC (Ch.1)
LPADC (Ch.2)
LPADC (Ch.3)
HPADC (Ch.0)
HPADC (Ch.1)
3.9.11 PWM
3.9.11.1 PWM Overview
The PWM repeats the output of High/Low at the specified cycle and the specified duty.
There are eight channels of the PWM, each which has the following functions.

Operating Frequency, Number of Channels
・Operates (when prescaler is 1/1) by the SCU clock (max. 13 MHz), total of eight channels equipped
・Up to four external output terminals (selected from internal PWM 8ch or combined for output)
・Each channel equips a prescaler (1/1 to 1/256)
・The PWM has a 15 bit resolution (1/32768 to 32767/32768), the cycle and output H width are freely
selectable within this range

Function for synchronization with ADC
・The PWM can be output using the data fix signal of any ADC channel as a reference
・ADC data can be captured after a specified duration from the rising edge of the PWM output

Synchronization function between PWM channels
・The PWM output can be synchronized between arbitrary PWM channels (including phase adjustment)

Combining function of external output signals
・Multiple channels can be arbitrarily selected and combined by OR or AND for each output terminal (total
of 4)

Timer function
・Can be used as a general-purpose timer when not used as a PWM, allowing readout of count values
・Can output interrupts to both the SCU internal sequencer and upper CPUs
・Interrupt is reflected in "INT_ENABLE_ERR_0"
3.9.11.2 PWM Control
The basic settings for the PWM channels n (n = 0, ..., 7) are made using the following registers.
Also refer to information after Section 3.9.12.3.154.
ch7 FIFO Rx (N1_R1_C)
ch8 FIFO Rx (N2_R1_C)
ch9 FIFO Rx (N3_R1_C)
ch10 FIFO Rx (N4_R1_C)
ch11 FIFO Rx (N5_R1_C)
FIFO Rx (N6_R1_C)
FIFO Rx (N7_R1_C)
ch19
ch20
ch21
ch22
ch23
ch24
ch25
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CXD5602 User Manual