Sony CXD5602 User Manual page 913

3.13.4.7 Timer
As general-purpose timers, Dual input Timers of AMBA
One timer for every processor, six timers in total are equipped. Since the control registers of the timer for each
processor are in the Private Peripheral Bus area, they can be accessed in Privileged Mode only.
For detailed control method, refer to AMBA
The base address of the control register is 0xE0043000. Each control register can be accessed with the same
address from each processor.
3.13.4.8 Watchdog Timer
As Watchdog Timers, Watchdog units of AMBA
One timer for every processor, six timers in total are equipped. Since the registers of the Watchdog Timer for each
processor are in the Private Peripheral Bus area, they can be accessed in Privileged Mode only.
For detailed control method, refer to AMBA
The base address of the control register is 0xE0044000. Each control register can be accessed with the same
address from each processor.
WDTRES signals of each Watchdog Timer are not connected to the reset signals of the corresponding processor,
but to the NMI. (Enable control of the WDTRES signals can be performed.)
Furthermore, 1 bit signal which is ORed among all WDTRES signals of the ADSP are connected to the WIC of
the ADSP through the interrupt controller of each ADSP. The same 1 bit signal is also connected to the System
and I/O Processor.
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