Sony CXD5602 User Manual page 150

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6. Interrupt confirmation
Confirm PMU_INT_STAT.STAT[1:0]=2'b01
7. Interrupt clear
PMU_INT_CLR.CLR[1:0]=2'b11
8. Clock control
Control the supply/stop of the clock in accordance with the function block or Analog circuit you use.
In the case of supplying the clock
SYS_PLL_CTRL1.ISP_LV_ENDSPCLK=1 (for each function block)
SYS_PLL_CTRL1.ISP_LV_ENGPADCCLK=1 (for GNSS)
In the case of stopping the clock
SYS_PLL_CTRL1.ISP_LV_ENDSPCLK=1 (for each function block)
SYS_PLL_CTRL1.ISP_LV_ENGPADCCLK=1 (for GNSS)
ON => OFF Control Flow
The following describes the flow to turn OFF the power supply of the SYSPLL.
1. SYSPLL power supply OFF setting
ANA_PW_CTL=32'h00040000
2. Interrupt clear
PMU_INT_CLR.CLR[1:0]=2'b11
3. Interrupt mask cancel
PMU_INT_MASK.MSK[1:0]=2'b00
4. SYSPLL power supply OFF control
PMU_PW_CTL.POWER_CTRL_ON=1
5. Interrupt confirmation
Confirm PMU_INT_STAT.STAT[1:0]=2'b01
6. Interrupt clear
PMU_INT_CLR.CLR[1:0]=2'b11
3.4.4.1.4
HPADC
OFF => ON Control Flow
The following describes the flow to turn ON the power supply of the HPADC. The PWD_SCU must be turned
ON for this operation.
1. HPADC initial setting
Turn ON either the XOSC or the RCOSC according to the operation mode of the HPADC.
For details, refer to Section xxx.
2. HPADC power supply ON setting
ANA_PW_CTL=32'h10001000
3. Interrupt clear
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CXD5602 User Manual

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