Sony CXD5602 User Manual page 119

Using the PWD_APP of Figure PMU (Power Management Unit)-27 as an example, Figure PMU (Power
Management Unit)-28 explains how individual power supply control is performed within the power domains. The
PWD_APP has a total of 1.5 Mbytes of SRAM as main memory for the Application Processor. It comprises 12
logic tiles in 128 Kbyte units, and each one can control the power supply individually. The power supply of the
main memory's upper layer is PWD_APP. When PWD_APP is ON, the main memory for the Application
Processor can be turned ON.
PMU
PWD_APP
Power switch
SRAM Array
Application
Power switch
Processor
<Tile #0> SRAM Peripheral
Power switch
SRAM Array
Application Power switch
Processor
SRAM Peripheral
<Tile #1>
Power switch
SRAM Array
Application Power switch
Processor
SRAM Peripheral
<Tile #11>
Power switch
Figure PMU (Power Management Unit)-28 Power Supply Control within the Power Domain (PWD_APP Main
There are three modes for power supply control of the SRAMs.

On mode

The power supply of the SRAM memory array and peripheral circuitry are ON, and R/W access to the
SRAM is possible.

Retention mode

A mode in which only the power supply of the SRAM memory array is ON, and the power supply of the
peripheral circuitry is turned OFF. In Retention mode, the SRAM cannot be accessed, but the data
within the SRAM is retained. By turning on (ON mode) the power supply of the peripheral circuitry of
PWD_SYSIOP
supply power to
PWD_SYSIOP
PWD_APP
Supply Power to
SRAM Array
Supply Power to
SRAM Peripheral
Memory)
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CXD5602 User Manual
Tile #0 (128KB)
SRAM for Application
Processor
Array
Peripheral
Tile #1 (128KB)
SRAM for Application
Processor
Application
Array
Processor
Peripheral
SRAM
(total 1.5MB)
Tile #11 (128KB)
for Application
SRAM
Processor
Array
Peripheral