Sony CXD5602 User Manual page 168

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Register: RAMMODE.LS (0x041006E4)
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Register: BOOT_CAUSE.RAW_WDT_REBOOT (0x04100484)
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SRAM: BackUpRAM
Note:
In the case of accessing the BackUpRAM after reset by WDT, clear the WDT factor register.
The WDT asserting flag of the System and I/O Processor is stored in the
BOOT_CAUSE.RAW_WDT_REBOOT.
To clear the flag, write "1" to the BOOT_CAUSE.CLR_WDT_REBOOT.
Reset by WDT can be made valid/invalid by the WDT_SRST_EN.EN.
3.5.6.2 Register Descriptions
Table Clock and Reset (Clock Reset Generator)-59 shows the control registers of reset by WDT.
Table Clock and Reset (Clock Reset Generator)-59 WDT Reset Control Registers
Address Register
Name
0x04100640 WDT_SR
ST_EN
0x04100484 BOOT_C
AUSE
Bit Field Type
Name
Reserved RO
EN RW
Reserved RO
CLR_WDT_REBOO WO
T
CLR_INITIAL_BOO WO
T
Reserved RO
RAW_WDT_REBOO RO
T
－168/1010－
Bit Initial Description
Value
[31:1] 0 Reserved
[0] 0 System reset by WDT valid/invalid
0: Invalid
1: Valid
[31:1] 0 Reserved
[5] 0 WDT asserting flag clear
1: Clear
BOOT_CAUSE.CAUSE.RAW_WDT_REB
OOT to "0"
[4] 0 Boot flag clear
1: Clear
BOOT_CAUSE.CAUSE.RAW_INITIAL_
BOOT to "0"
[3:2] 0 Reserved
[1] 0 WDT asserting flag
1: Reset enable occurred by WDT asserting.
CXD5602 User Manual