Sony CXD5602 User Manual page 123

GNSS Domain PWD_GNSS_ITP
PWD_GNSS
SRAM (GNSS BB#0)
SRAM (GNSS BB#1)
SRAM (GNSS BB#2)
SRAM (GNSS BB#3)
SRAM (GNSS BB#4)
SRAM (GNSS BB#5)
RF (LNA)
RF (MIX)
RF (IF)
RF (ADC)
RF (LO)
RF (PLL)
3.4.1.3 Block Diagram
Figure PMU (Power Management Unit)-30 shows the block diagram of the PMU, which is mainly comprised of
three blocks.

AHB IF
This is the control register of the PMU. After setting the power supply control of the power domain,
analog circuit, and SRAM, setting the power supply control request PMU_PW_CTL starts the power
supply control. The status of the power switch can be confirmed by reading the control register.

Check Register Value
In response to the power supply control request, this checks whether or not there are errors in the power
supply control register settings (PWD_CTL, *_RAMMODE_SEL, ANA_PW_CTL). Power supply
control is executed only when the register settings are correct, and not performed when they are
incorrect. For example, when a power supply of the upper layer (PWD_APP) is OFF, and a power
supply of the lower layer (PWD_APP_DSP) receives a setting request to turn it ON, this is judged as an
incorrect setting and power supply control is not performed.

Power Control Sequencer
This sequencer identifies the upper and lower layers of the power supply and automatically controls the
order of the power supply switch control. When the power supply is controlled from OFF to ON, the
operation begins from the power supply in the upper layer. Conversely, when the power supply is
controlled from ON to OFF, the operation begins from the power supply in the lower layer. In this way,
using only 1 power supply control request, power supply control of the power supply in the upper layer
(PWD_APP) and power supply control of the power supply in the lower layer (PWD_APP_DSP) can be
done together. For example, when issuing a power supply control request to turn ON both the upper
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