Sony CXD5602 User Manual page 241

Important Points to Note

About locked transfer
Locked transfer is not supported. Do not set the corresponding function registers.

DMACConfiguration
Make sure to set the M1, M2 bits to little endian. Setting them to big endian is prohibited.

DMACSync
Use it with the synchronization logic enabled.

DMACSreqMask
Use it with Input enable (Default).

Transfer using DefLLI function
In the case of writing to the DMACConfiguration_n while the DMAC channel is transferring data, set the
DMACDefLLI_n.DefLE to "0" beforehand regardless of the bit to be set. Violation of this restriction can
result in unexpected operation of the DMAC.

About the Src/Dest address
For 32bit (Word), 16bit (HalfWord) access, the addresses must be aligned. Make sure to follow the
restrictions of each channel's SrcAddr, DstAddr, and Swidth, Dwidt.
1. If Swidth=Word, SrcAddr[1:0]=2'b00
2. If Swidth=HalfWord, SrcAddr[0]=1'b0
3. If Dwidth=Word, DstAddr[1:0]=2'b00
4. If Dwidth=HalfWord, DstAddr[0]=1'b0

About Transfersize
When the Dwidth is larger than the Swidth in each DMAC channel, depending on the TransferSize, broken
numbers may occur against the data width, and the transfer cannot be completed and the data will be lost.
Transfer completion interrupts will not be issued either. Make sure to follow the below restrictions regardless
of the flow control of the DMAC.
1. If Swidth=Byte, Dwidth=HalfWord, the TransferSize must be a multiple of two.
2. If Swidth=Byte, Dwidth=Word, the TransferSize must be a multiple of four.
3. If Swidth=HalfWord, Dwidth=Word, the TransferSize must be a multiple of two.

About the master port setting
When accessing an address area outside the IMG block, use the AHB1 port. When accessing the internal
peripheral area, use the AHB2 port. Be cautious with the settings of related function registers.
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CXD5602 User Manual