Sony CXD5602 User Manual page 194

3.6.5.2.22 AlmOutEn1(0x78)
31 30 29 28
Err
Reserved
Dbg
RO -
15 14 13 12
Dbg Reserved
RO -

bit[0] : En (Enable Signal for Normal Alarm1 Interrupt)
This register does the settings for notifying processor of Normal Alarm Flag1.
It takes time to reflect the settings. During reflecting, do not update the settings. You can check whether it is
in the process of reflecting by using Busy.
En
0
1
If 1'b0 is set on En,
an interrupt request is disabled. However, status register AlmFlg.Flg1 transitions to 1'b1 if conditions are met.

bit[8] : Busy (Write Busy Status)
This register indicates how far AlmOutEn1register is reflected.
When Busy indicates "1", the register is reflecting Enable Signal (means that AlmOutEn1 must not be
updated). Once the reflection is completed, Busy becomes "0" automatically.
Busy
0
1

bit[15] : Dbg (Enable Signal Value for current Normal Alarm1 Interrupt)
This register is used for debugging. By reading this register, you can see Enable Signal value for the Normal
Alarm1 Interrupt that is currently used in RTC. By using this register, you can check whether the set value
has been normally reflected on AlmOutEn1.En or not.

bit[16] : ErrEn (Enable Signal for Error Alarm1 Interrupt)
This register does the settings for notifying processor of Error Alarm Flag1.
27 26 25
11 10 9
Description of Functions
Writing 0: disables an interrupt request to processor.
Even if conditions are met, interrupt will be deasserted.
Writing 1: enables an interrupt request to processor.
If conditions are met, interrupt will be asserted.
Description of Functions
Reading 0: AlmOutEn1 is not set or reflected completely.
Reading 1: AlmOutEn1 is being reflected. AlmOutEn1 must not be written.
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24 23 22 21
8 7 6 5
Busy Reserved
RO -
CXD5602 User Manual
20 19 18 17
4 3 2 1
16
Err
En
RW
0
En
RW