Accessing The Debug Registers - Intel PXA255 User Manual

Configuration
Table 7-26. Accessing the Debug Registers
Read Transmit Debug Register (TX)
Write TX
Read Receive Debug Register (RX)
Write RX
Read Debug Control and Status Register (DCSR)
Write DCSR
Read Trace Buffer Register (TBREG)
Write TBREG
Read Checkpoint 0 Register (CHKPT0)
Write CHKPT0
Read Checkpoint 1 Register (CHKPT1)
Write CHKPT1
Read Transmit and Receive Debug Control
Register
(
Write TXRXCTRL
7-18
Function
TXRXCTRL)
CRn (Register #)
0b1000 MRC p14, 0, Rd, c8, c0, 0
0b1000 MCR p14, 0, Rd, c8, c0, 0
0b1001 MRC p14, 0, Rd, c9, c0, 0
0b1001 MCR p14, 0, Rd, c9, c0, 0
0b1010 MRC p14, 0, Rd, c10, c0, 0
0b1010 MCR p14, 0, Rd, c10, c0, 0
0b1011 MRC p14, 0, Rd, c11, c0, 0
0b1011 MCR p14, 0, Rd, c11, c0, 0
0b1100 MRC p14, 0, Rd, c12, c0, 0
0b1100 MCR p14, 0, Rd, c12, c0, 0
0b1101 MRC p14, 0, Rd, c13, c0, 0
0b1101 MCR p14, 0, Rd, c13, c0, 0
0b1110 MRC p14, 0, Rd, c14, c0, 0
0b1110 MCR p14, 0, Rd, c14, c0, 0
Intel® XScale™ Microarchitecture User's Manual
Instruction