Write Buffer And Fill Buffer Overview - Intel PXA255 User Manual

Figure 6-2. Mini-Data Cache Organization
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6.1.3

Write Buffer and Fill Buffer Overview

The Intel® XScale™ core employs an eight entry write buffer, each entry containing 16 bytes.
Stores to external memory are first placed in the write buffer and subsequently taken out when the
bus is available.
The write buffer supports the coalescing of multiple store requests to external memory where those
stores are to a common 16-byte aligned address location. A store to memory may coalesce with any
of the preceding eight entries so long as the store is to a bufferable memory page.
The fill buffer holds the external memory request information for a data cache or mini-data cache
fill or non-cacheable read request. Up to four 32-byte read request operations can be outstanding in
the fill buffer before the Intel® XScale™ core needs to stall.
The fill buffer has been augmented with a four entry pend buffer that captures data memory
requests to outstanding fill operations. Each entry in the pend buffer contains enough data storage
to hold one 32-bit word, specifically for store operations. Cacheable load or store operations that
hit an entry in the fill buffer get placed in the pend buffer and are completed when the associated
fill completes. Any entry in the pend buffer can be pended against any of the entries in the fill
buffer; multiple entries in the pend buffer can be pended, or postponed, awaiting a particular entry
in the fill buffer to complete.
Pended operations complete in program order.
Intel® XScale™ Microarchitecture User's Manual
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