Round-Robin Replacement Algorithm - Intel PXA255 User Manual

Example 3-3. Locking Entries into the Data TLB
; R1, and R2 contain the virtual addresses to translate and lock into the data TLB
MCR P15,0,R1,C8,C6,1
MCR P15,0,R1,C10,C8,0
; Repeat sequence for virtual address in R2
MCR P15,0,R2,C8,C6,1
MCR P15,0,R2,C10,C8,0
CPWAIT
; For a description of CPWAIT, see
; Section 2.3.3, "Additions to CP15 Functionality" on page 2-10
; The MMU is guaranteed to be updated at this point; the next instruction will
; see the locked data TLB entries.
Note: If exceptions are allowed to occur in the middle of this routine, the TLB may end up caching a
translation into a data TLB entry that was about to be locked. In general exceptions should be
avoided while locking TLB entries. Software should preferably lock TLBs in Supervisor mode.
3.4.4

Round-Robin Replacement Algorithm

The line replacement algorithm for the TLBs is round-robin; there is a round-robin pointer that
keeps track of the next entry to replace. The next entry to replace is the one sequentially after the
last entry that was written. For example, if the last virtual to physical address translation was
written into entry 5, the next entry to replace is entry 6.
At reset, the round-robin pointer is set to entry 31. Once a translation is written into entry 31, the
round-robin pointer gets set to the next available entry, beginning with entry 0 if no entries have
been locked down. Subsequent translations move the round-robin pointer to the next sequential
entry until entry 31 is reached, where it will wrap back to entry 0 upon the next translation.
A lock pointer is used for locking entries into the TLB and is set to entry 0 at reset. A TLB lock
operation places the specified translation at the entry designated by the lock pointer, moves the
lock pointer to the next sequential entry, and resets the round-robin pointer to entry 31. Locking
entries into either TLB effectively reduces the available entries for updating. For example, if the
first three entries were locked down, the round-robin pointer would be entry 3 after it rolled over
from entry 31.
Only entries 0 through 30 can be locked in either TLB; entry 31 can never be locked. If the lock
pointer is at entry 31, a lock operation will update the TLB entry with the translation and ignore the
lock. In this case, the round-robin pointer will stay at entry 31.
Intel® XScale™ Microarchitecture User's Manual
; Invalidate the data TLB entry specified by the
; virtual address in R1
; Translate virtual address (R1) and lock into
; data TLB
; Invalidate the data TLB entry specified by the
; virtual address in R2
; Translate virtual address (R2) and lock into
; data TLB
; wait for locks to complete
Memory Management
3-7