Host Vrefs; Itp Debug Port; Logic Analyzer Interface (Lai); Mechanical Considerations - Intel 852GME Design Manual

R

Table 13. Processor RESET# Signal Routing Guidelines with ITP700FLEX Connector

L1
0.1" – 0.5"
4.4.

Host Vrefs

The AGTL+ VREF provides a reference voltage for all of the FSB signals on the CP. It is required that a
voltage divider yields 0.63 *VCC_AVG where VCC_AVG is the average voltage of VCC_CPU and
GMCH_VTT. The output is then routed to the CPU's GTLREF.
4.5.

ITP Debug Port

Please refer to the ITP700 Debug Port Design Guide, which can be found on
http://developer.intel.com/design/Xeon/guides/249679.htm.
4.5.1.

Logic Analyzer Interface (LAI)

Intel is working with two logic analyzer vendors to provide logic analyzer interfaces (LAIs) for use in
debugging the Mobile Intel Pentium 4 processor system. Tektronix* and Agilent* should be contacted
to get specific information about their logic analyzer interfaces. The following information is general in
nature. Specific information must be obtained from the logic analyzer vendor.
Due to the complexity of the Mobile Intel Pentium 4 processor system, the LAI is critical in providing
the ability to probe and capture system bus signals. There are two sets of considerations to keep in mind
when designing Mobile Intel Pentium 4 processor that can make use of an LAI: mechanical and
electrical.
4.5.1.1.

Mechanical Considerations

The LAI is installed between the processor socket and the Mobile Intel Pentium 4 processor. The LAI
pins plug into the socket, while the Mobile Intel Pentium 4 processor plugs into a socket on the LAI.
Cabling that is part of the LAI egresses the system to allow an electrical connection between the Mobile
Intel Pentium 4 processor and a logic analyzer. The maximum volume occupied by the LAI, known as
the keepout volume, as well as the cable egress restrictions, should be obtained from the logic analyzer
vendor. System designers must make sure that the keepout volume remains unobstructed inside the
system. Note that it is possible that the keepout volume reserved for the LAI may include space
normally occupied by the Mobile Intel Pentium 4 processor heat sink. If this is the case, the logic
analyzer vendor will provide a cooling solution as part of the LAI.
4.5.1.2.

Electrical Considerations

The LAI will also affect the electrical performance of the system bus; therefore, it is critical to obtain
electrical load models from each of the logic analyzers to be able to run system level simulations to
prove that their tool will work in the system. Contact the logic analyzer vendor for electrical
specifications and load models for the LAI solution they
® ®
Intel 852GME, Intel 852GMV and Intel
L1+L4 L2 + L3
1.0" – 6.0" 12.0" max
®
852PM Chipset Platforms Design Guide
FSB Design Guidelines
L3 Rs
0.5" max Rs = 150 ± 1%
provide.
Rtt
Rtt = 51 ± 1%
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