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DBG.RX is written to RX following an Update_DR when the RX Write Logic enables the RX
register.
10.10.6.6
DBG.D
DBG.D is provided for use during high speed download. This bit is written directly to
TXRXCTRL[29]. The debugger sets DBG.D when downloading a block of code or data to the
Intel® XScale™ core system memory. The debug handler then uses TXRXCTRL[29] as a branch
flag to determine the end of the loop.
Using DBG.D as a branch flags eliminates the need for a loop counter in the debug handler code.
This avoids the problem were the debugger's loop counter is out of synchronization with the debug
handler's counter because of overflow conditions that may have occurred.
10.10.6.7
DBG.FLUSH
DBG.FLUSH allows the debugger to flush any previous data written to RX. Setting DBG.FLUSH
clears TXRXCTRL[31].
10.10.7
Debug JTAG Data Register Reset Values
Upon asserting TRST, the DEBUG data register is reset. Assertion of the reset pin does not affect
the DEBUG data register.
these values apply for DBG_REG for SELDCSR, DBGTX and DBGRX.
Table 10-15. DEBUG Data Register Reset Values
DBG_REG[33:2]
10.11
Trace Buffer
The 256 entry trace buffer provides the ability to capture control flow information to be used for
debugging an application. Two modes are supported:
1. The buffer fills up completely and generates a debug exception. Then
buffer.
2. The buffer fills up and wraps around until it is disabled. Then software empties the buffer.
10.11.1
Trace Buffer CP Registers
CP14 defines three registers (see
are accessible using MRC, MCR, LDC and STC (CDP to any CP14 registers will cause an
undefined instruction trap). The CRn field specifies the number of the register to access. The CRm,
opcode_1, and opcode_2 fields are not used and must be set to 0.
Intel® XScale™ Microarchitecture User's Manual
Table 10-15
Bit
DBG_REG[0]
DBG_REG[1]
DBG_REG[34]
Table
shows the reset and TRST values for the data register. Note:
TRST
0
0
unpredictable
0
10-16) for use with the trace buffer. These CP14 registers
Software Debug
RESET
unchanged
unchanged
unpredictable
unchanged
empties the
software
10-23
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