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Programming Model
Memory accesses marked as "stall until complete" (see
data aborts. For these types of accesses, the fault is easier to manage than the general case as it is
guaranteed to be raised within three instructions of the instruction that caused it. In other words, if
a "stall until complete" LD or ST instruction triggers an imprecise fault, then that fault will be seen
by the program within three instructions.
With this knowledge, it is possible to write code that can reliably access faulting memory. Place
three NOP instructions after such an access. If an imprecise fault occurs, it will do so during the
NOPs; the data abort handler will see identical register and memory state as it would with a precise
exception, and so would be able to recover. An example of this is shown in
page
2-14.
Example 2-2. Shielding Code from Potential Imprecise Aborts
;; Example of code that maintains architectural state through the
;; window where an imprecise fault might occur.
Of course, if a system design precludes events that could cause external aborts, then such
precautions are not necessary.
Multiple Data Aborts
Multiple data aborts may be detected by hardware but only the highest priority one will be
reported. If the reported data abort is precise, software can correct the cause of the abort and re-
execute the aborted instruction. If the lower priority abort still exists, it will be reported. Software
can handle each abort separately until the instruction successfully executes.
If the reported data abort is imprecise, software needs to check the Saved Program Status Register
(SPSR) to see if the previous context was executing in abort mode. If this is the case, the link back
to the current process has been lost and the data abort is unrecoverable.
2.3.4.5
Events from Preload Instructions
A PLD instruction will never cause the Data MMU to fault for any of the following reasons:
•
Domain Fault
•
Permission Fault
•
Translation Fault
If execution of the PLD would cause one of the above faults, then the PLD does not cause the load
to occur.
This feature allows software to issue PLDs speculatively.
instruction early in the loop. This PLD is used to fetch data for the next loop iteration. In this
example, the list is terminated with a node that has a null pointer. When execution reaches the end
of the list, the PLD on address 0x0 will not cause a fault. Rather, it will be ignored and the loop
will terminate normally.
2-14
LD
R0, [R1]
NOP
NOP
NOP
; Code beyond this point is guaranteed not to see any aborts
; from the LD.
Section
3.2.3) can also result in imprecise
; R1 points to stall-until-complete
;
region of memory
Example 2-3 on page 2-15
Intel® XScale™ Microarchitecture User's Manual
Example 2-2 on
places a PLD
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