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Table 7-20. Coprocessor Access Register (Sheet 2 of 2)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
reset value: 0x0000_0000
Bits
15:14
13:1
0
A typical use for this register is for an operating system to control resource sharing among
applications. All applications can be denied access to CP0 by clearing the appropriate coprocessor
bit in the Coprocessor Access Register. An application may request the use of the accumulator in
CP0 by issuing an access to the resource, which will result in an undefined exception. The
operating system may grant access to this coprocessor by setting the appropriate bit in the
Coprocessor Access Register and return to the application where the access is retried. Sharing
resources among different applications requires a state saving mechanism.
Two possibilities are:
•
The operating system, during a context switch, could save the state of the coprocessor if the
last executing process had access rights to the coprocessor.
•
The operating system, during a request for access, saves off the old coprocessor state with the
last process to have access to it.
Under both scenarios, the OS needs to restore state when a request for access is made. This means
the OS has to maintain a list of what processes are modifying CP0 and their associated state.
A system programmer making this OS change should include code for coprocessors CP0 through
CP13. Although the PXA255 processor only supports CP0, future products may implement
additional coprocessor functionality from CP1-CP13.
7.3
CP14 Registers
Table 7-21
Intel® XScale™ Microarchitecture User's Manual
Access
Read-as-Zero/Write-as-Zero
Read / Write
Read / Write
lists the CP14 registers implemented in the Intel® XScale™ core.
8
C
C
C
C
C
C
P
P
P
P
0 0
P
P
1
1
1
1
9
8
3
2
1
0
Description
Reserved - Should be programmed to zero for future
compatibility
Coprocessor Access Rights-
Each bit in this field corresponds to the access rights for
each coprocessor. Only CP0 has any effect on
s
application processor
CP1-CP13 must always be written
as zero
Coprocessor Access Rights-
This bit corresponds to the access rights for CP0.
0 = Access denied. Any attempt to access the
corresponding coprocessor will generate an
Undefined exception, even in privileged modes.
1 = Access allowed. Includes read and write accesses.
Configuration
7
6
5
4
3
2
1
0
C
C
C
C
C
C
C
C
P
P
P
P
P
P
P
P
7
6
5
4
3
2
1
0
the
7-15
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