Multiply With Internal Accumulate Format - Intel PXA255 User Manual

Xscale microarchitecture
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Programming Model
Table 2-1. Multiply with Internal Accumulate Format
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
cond
Bits
31:28
19:16
15:12
7:5
3:0
Two new fields were created for this format, acc and opcode_3. The acc field specifies 1 of 8
internal accumulators to operate on and opcode_3 defines the operation for this format. The Intel®
XScale™ core defines a single 40-bit accumulator referred to as acc0; future implementations may
define multiple internal accumulators. The Intel® XScale™ core uses opcode_3 to define six
instructions, MIA, MIAPH, MIABB, MIABT, MIATB and MIATT.
Table 2-2. MIA{<cond>} acc0, Rm, Rs
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
cond
Operation: if ConditionPassed(<cond>) then
Exceptions: none
Qualifiers Condition Code
Notes:
The MIA instruction operates similarly to MLA except that the 40-bit accumulator is used. MIA
multiplies the signed value in register Rs (multiplier) by the signed value in register Rm
(multiplicand) and then adds the result to the 40-bit accumulator (acc0).
2-4
1 1 1 0 0 0 1 0
opcode_3
Description
cond - ARM* condition codes
opcode_3 - specifies the type of multiply with
internal accumulate
Rs - Multiplier
acc - select 1 of 8 accumulators
Rm - Multiplicand
1 1 1 0 0 0 1 0 0 0 0 0
acc0 = (Rm[31:0] * Rs[31:0])[39:0] + acc0[39:0]
No condition code flags are updated
Early termination is supported. Instruction timings can be found
in
Section 11.2.4, "Multiply Instruction Timings" on page
Specifying R15 for register Rs or Rm has unpredictable results.
acc0 is defined to be 0b000 on the Intel® XScale™ core.
8
Rs
0 0 0 0
-
The
Intel® XScale™ core defines the
following:
MIA
0b0000 =
MIAPH
0b1000 =
MIABB
0b1100 =
MIABT
0b1101 =
MIATB
0b1110 =
MIATT
0b1111 =
The effect of all other encodings are
unpredictable.
The
Intel® XScale™ core only implements
acc0; access to any other acc has
unpredictable effect.
-
8
Rs
0 0 0 0 0 0 0 1
Intel® XScale™ Microarchitecture User's Manual
7
6
5
4
3
2
1
0
acc
1
Rm
Notes
7
6
5
4
3
2
1
0
Rm
11-5.

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