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TEST ACCESS PORT (TAP)
shift register with "000001") and Shift-IR operate on rising edges of TCK, and Update-IR
(which updates the actual instruction register) takes place on the falling edge of TCK.
1
2
TCK
TMS
TAP
Controller
State
TDI
TDO
Instruction
6.2.2.
Accessing the Data Registers
The test data registers in the processor are designed in the same way as the instruction
register, with components (i.e., either the "capture" or "update" functionality) removed from
the basic structure as needed. Data registers are accessed just as the instruction register is,
only using the "select-DR-scan" branch of the TAP finite state machine in Figure 6-2. A
specific data register is selected for access by each TAP instruction. Note that the only
controller states in which data register contents actually change are Capture-DR, Shift-DR,
Update-DR and Run-Test/Idle. For each of the TAP instructions described below, therefore,
it is noted what operation (if any) occurs in the selected data register in each of these four
states.
6-6
3
4
5
6
7
IDCODE
Figure 6-5. TAP Instruction Register Access
8
9
10
11
12
13
14
15
16
BYPASS
000944
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