Access Diagram - Mitsubishi Electric Q12DCCPU-V User Manual

13
COMMUNICATIONS BETWEEN CPU MODULES
13.3.1
The following shows the CPU shared memory structure and accessibility of the C
Controller module.
*1, *6
Area name
Address
0 (0 )
H H
to
1FF (5F )
H H
200 (60 ) QCPU
H H
to standard
7FF (BF ) area
H H
800 (C0 )
H H
to
FFF (1FF )
H H
1000
H
to
Use prohibited
270F
H
2710
H
Multiple CPU high speed
to
transmission area
5F0F
H
13
- 14 13.3 Data Communications Using CPU Shared Memory
13.3.1 CPU shared memory structure
CPU shared memory structure
Power supply
Table 13.8 Accessibility
Access to host 1)
Write
Host CPU operation
N/A
information area
System area N/A
Auto refresh area Accessible
User setting area Accessible
*7
N/A
Accessible
*7
* 1 Indicates addresses of the CPU shared memory.
* 2 To write data to the auto refresh area or user setting area of the host CPU (C Controller module),
use the QBF_ToBuf function.
* 3 To read data from the host CPU operation information area, auto refresh area, or user setting area
of the host CPU (C Controller module), use the QBF_FromBuf function.
* 4 To read data from the host CPU operation information area, auto refresh area, or user setting area
of another CPU (programmable controller CPU or Motion CPU), use the QBF_FromBuf function.
* 5 For information on how to access from another CPU (programmable controller CPU or Motion
CPU), refer to the manual for each CPU module.
* 6 When CPU No.1 is a Basic model QCPU, addresses of the CPU shared memory are as shown in
parentheses.
* 7 For the Q06CCPU-V(-B), the use prohibited area and Multiple CPU high speed transmission area
are not provided.
Programmable
controller CPU
2)
CPU shared memory CPU shared memory
of another CPU
Sequence
program
Figure 13.9 Access diagram
Access from host CPU
Access to another CPU 2)
*2 *3
Write
Read
Accessible N/A
N/A N/A
Accessible N/A
Accessible N/A
N/A N/A
Accessible N/A
Q12DCCPU-V Q06CCPU-V
Programmable
C Controller module
controller CPU
(host CPU)
Motion CPU
C Controller module
(another CPU)
User program
2)
CPU shared memory
of another CPU of host CPU
Program
Access from another
Access to host CPU 3)
*4
Write
Read
Accessible N/A
Accessible N/A
Accessible N/A
Accessible N/A
N/A N/A
Accessible N/A
Q06CCPU-V-B
1)
3)
CPU
*5
Read
Accessible
Accessible
Accessible
Accessible
N/A
Accessible