Multiple Cpu Synchronous Interrupt - Mitsubishi Electric Q12DCCPU-V User Manual

Melsec q series, c controller module
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1
OVERVIEW
(5) Sophisticated and high-precision sequential and tracking controls
1
- 6
1.1 Features
(Q12DCCPU-V only)
The C Controller module can execute an interrupt routine (interrupt program) when
one of the following interrupts occurs.
Interrupt routine (interrupt program) execution does not produce a delay that could be
caused by user program execution or priority in multitasking.
For this reason, high-performance and high-accuracy sequential controls and tracking
controls that respond in real-time can be realized for occurred interrupts.
(a) Multiple CPU synchronous interrupt
The multiple CPU synchronous interrupt is an interrupt that is issued in the same
cycles (0.88ms) as Motion CPU (Q172DCPU or Q173DCPU) control cycles.
Data acquisition is available in each operation cycle of a Motion CPU by running
an interrupt routine (interrupt program) for the multiple CPU synchronous
interrupt.
The multiple CPU synchronous interrupt can also be used for real-time sequential
controls synchronized with motion control and also for tracking controls in which
the target value is changing every second.
Motion CPU
C Controller module
Interrupt program
Figure 1.6 Multiple CPU synchronous interrupt
C Controller module
Synchronous
execution in cyclic
transmission timing
Interrupt program
CPU No.1 data
CPU No.2 data
Stroke
Ideal trajectory
Actual trajectory
Operation
cycle
0.88ms
User program
Motion CPU
(Q172DCPU,Q173DCPU)
Operation cycle
0.88ms
Motion program
Synchronized!!
Cyclic
CPU No.1 data
transmission
cycle 0.88ms
CPU No.2 data
Operation cycle

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